Department of Computer Science chair Sandhya Dwarkadas has won the Technical Committee on Computer Architecture's 2022 Test of Time Award for “Energy-efficient processor design using multiple clock domains with dynamic voltage and frequency scaling,” a paper she co-authored in 2002.
Dwarkadas, the Walter N. Munster Professor of Computer Science at the University of Virginia School of Engineering and Applied Science, received the award with her colleagues at HPCA2023, the 29th IEEE International Symposium on High-Performance Computer Architecture, in February.
The Technical Committee on Computer Architecture is a unit of the Institute of Electrical and Electronics Engineers Computer Society. The committee's citation notes the Test of Time Award is the “highest honor an academic paper can receive for its impact and recognizes an HPCA paper whose influence is still felt 18-22 years after its initial publication.”The paper described a new design approach to address emerging challenges in the organization of computer processors related to frequency scaling, a means of managing power for energy conservation and temperature control. The paper's impact has been felt in several realms within the computer architecture research field, as enumerated in the award citation:
The paper introduced a microarchitecture design methodology in which the chip is divided into several clock and frequency domains that can be independently configured to exploit the benefits of frequency and voltage scaling. The paper introduced this revolutionary design concept at a time when the architecture community was coming to grips with the difficulty of continued frequency scaling. The paper had a significant impact; as of this writing, it has been cited 549 times according to Google Scholar and continues to remain highly cited in recent literature. The paper has guided thought on power and temperature aware architecture, power in multicore systems, robust exploitation of DVFS techniques, globally asynchronous / locally synchronous processors, and more recently voltage underscaling and even hardware security. IEEE Xplore counts 157 patent citations for this paper, indicating significant industry impact.
Dwarkadas' co-authors all of them her colleagues in the departments of Computer Science and Electrical and Computer Engineering at the University of Rochester at the time were Greg Semeraro, Grigorios Magklis, Rajeev Balasubramonian, David H. Albonesi and Michael L. Scott.